The combinational circuit is the combination of gates, whose perform the various type of digital operation. Combinational circuit has no memory. It means the present output of the circuit is not depending on the previous input. It only depends upon the present input. The combinational circuit is made by NAND, NOR and NOT logic gates, and the logic gates are made up electronics components. Some examples of combinational circuit is half adder, full adder, multiplexer, demultiplexer, codes converter encoder and decoder. The combinational circuit is to perform Boolean algebra. In mathematical term, output is the function of input, i.e. input=f (output)
what is a combinational circuit
The combinational circuit is digital logic circuits that contain different types of logic gates. In other word, the different types of logic gate like AND, OR, NOT & EX-OR etc gate are combined is known as a combinational logic circuit. The output of combinational circuit is depends on present inputs only. It does not depend on past and future inputs. It is different type’s circuit such as Adder, Subtractor, Encoder, Decoder, Multiplexer, and De-multiplexer.
Combinational circuit has some characteristic which is given below
- It is memory less. It is not capable to store data.
- At any instant of time the output of combination circuit is depends upon the present input.
- It has ‘n’ input and ‘m’ output.
- Working speed is fast.
- Circuit design is not complex.
- Time independent circuit.
- There is no feedback element.
- It doesn’t required clock signal.
- It has no memory elements.
Example of combinational circuit
The combinational circuit is the combination of logic gates like AND, OR, NOT & EX-OR etc. The output of combinational circuit is dependents upon the present inputs only. This means it is memory less. It output doesn’t depends upon on the past inputs. The example of combinational circuits is Adder, Subtractor, Converter, and Encoder/Decoder.
Combinational circuit diagram
In input side of combinational circuit have an n number of inputs and m number of outputs. The output is depends on present inputs only. The block diagram of combination circuit is given below.
Combinational circuits types
A Combinational circuits are three types which is describe below:
- Arithmetic and logic circuit:- Adder, Subtraction, Multiplication, Comparator and Logic operation is done in this section.
- Data manipulation:- Multiplexers, Demultiplexers, Encoder, Decoder and Priority.
- Code converter:- Binary to Gray, Gray to Binary, Binary to Excess 3, seven-segment
Adder circuit is a digital circuit that performs addition in computer. It is the basic circuit in and is found in arithmetic logic units. The adder is two type
- Half adder
- Full adder
Half adder is a combination of logic adder circuit with two inputs and two outputs. The inputs are A & B, and outputs are carry (C) other is sum (S). It is founded in arithmetic and logic units. The half adder circuit is performing the addition of two single binary digits in computer. If we have two single binary digits, the half adder perform addition operation and gives two outputs one is sum (S) and another is carry (C). The carry shows the any overflow of the addition of two binary digits. Below the figure shows the block diagram, truth table and logic circuit.
Block diagram of half adder
Below the figure show the block diagram of half adder. this circuit consist of two input A and B and it has only two output “Sum” and “Carry”
Truth table of half adder
In half adder, when any one of the input is high the sum is high and carry is low. when both inputs is high the sum will be low “0” and carry is high “1”. When both inputs is low the sum and carry is low. The truth table of half adder circuit is given below.
Logic diagram of half adder
The half adder circuit contain one EX-OR and one AND gate. The sum of half adder is obtained by EX-OR of inputs A & B, and the carry is obtained by the AND of the inputs A & B. the logic diagram of half adder is shown below.
Sum (S) = A ⊕ B=A’B+AB’
Carry (C) = AB
K-map of half adder
Consider truth table of half adders for design K-map and the inputs of half adder is X and Y
K-map for Sum
The Boolean expression of sum will be
The Boolean expression of carry will be
Half adder implemented by NAND gates
The half adder is implemented by the NAND gate. For implementation of half adder via NAND gates we use five NAND gate connected with each other. It has two inputs A & B and two outputs carry (C) and sum (S). The figure of half adder using NAND gates is shown below.
Half adder implemented by NOR gates
The half adder is implemented by the NOR gate. For implementation of half adder via NOR gates we use five NOR gate connected with each other. It has two inputs A & B and two outputs carry (C) and sum (S). The figure of half adder using NOR gates is shown below.
Half adder limitation
There is some half adder limitation. In half adder we only add two binary bits. We can’t add three binary bits. The third bit is previous carry bit. It is the major limitation of half adder. This problem of half adder is resolves the full adder.
The full adder is a combination of logic adder circuit. It is also constructed by the cascaded of two half adder. It is founded in arithmetic and logic units. The full adder performs the addition of three binary bits in computer. It has three inputs and two outputs. The inputs are A, B, and Cout (carry input). The outputs of full adder are carry out (Cout ) other is sum (S). The inputs A & B are operands and the third C-IN is a bit carried in from the previous asthmatic operation stage. The output of sum (s) = A ⊕ B ⊕ Cin and the output of carry is Cout = (A ⋅ B) + (Cin ⋅ (A ⊕ B)). The full adder block diagram, truth table and logic circuit are shown below.
Block diagram of full adder
Truth table of full adder
Logic diagram of full adder
K-map of full adder
Consider truth table of full adders for design K-map.
K-map for Sum
K-map for carry
Full adder is also implemented by cascading of two half adder which is given below
Full adder implemented by NAND gates-
The full adder is implemented by the NAND gate. For implementation of full adder via NAND gates uses nine NAND gate connected with each other. Full adder inputs are A, B and Cin. Outputs are Cout and Sum. The figure of full adder using NAND gates is shown below.
Full adder implemented by NOR gates
The full adder is implemented by the NOR gate. For implementation of full adder via NOR gates uses twelve NOR gates connected with each other. Full adder inputs are A, B and Cin. Outputs are Cout and Sum. The figure of full adder using NOR gates is shown below
The subtractor is use for subtracting the one number from the other. We are dealing with binary bits. 1s complement and 2s complement of the numbers are used for result. Three bits are involved in performing subtraction. The three bits are minuend (X), subtrahend (Y) and borrow (Bi). Borrow in from the previous location. The outputs are two one is difference (D) and other is borrowing bit (Bout). The Subtractor is the essential combinational logic circuits that are used in digital computer. The Subtractor is the part of arithmetic logic unit.
There are two type subtractor
- Half subtractor
- Full subtractor
A half Subtractor is a combinational logic circuit that performs a subtraction operation of two binary digits. The inputs of half Subtractor are X and Y, which is two binary bits and outputs are difference (D) and borrow (B). The expressions of half Subtractor is
Difference bit is
d = A ⊕ B=A’B+AB’
Borrow bit is
b = NOT-X AND Y = X̄.Y
If we compare the Boolean expression of half adder and half Subtractor, we can see the sum of half adder is same the difference of half subtractor, and the carry of half adder is less difference of half subtractor. We can simply convert half adder to half subtractor by inversion of the minuend input X.
Limitation of half subtractor
The major limitation of half subtractor logic circuit is no provision for “borrow in” from the previous state when subtracting the multiple data from each other. This limitation of the half subtractor is resolved in full subtractor.
block diagram of half subtractor
Logic diagram of half subtractor
Truth table of half subtractor
K-map for half subtractor
Consider truth table of half subtractor for design K-map. The inputs are A and B
K-map for Difference
K-map for Borrow
Half subtractor using NAND gate
Using Five NAND gates for implementation of half Subtractor.
NAND gates Boolean expression of half Subtractor
A full Subtractor is a combinational logic circuit that performs a subtraction operation of three binary digits. The inputs of half Subtractor are X and Y and borrow-in (Bin) and outputs are difference (D) and borrow-out (Bout). The expressions of full Subtractor is
Difference bit is
d = (A ⊕ B) ⊕ Bin
Borrow-out bit is
b = A’.B + (A ⊕ B)’
If we compare the Boolean expression of full adder and full Subtractor, we can see the sum of full adder is same the difference of full subtractor.
Block diagram of full subtractor
Logic diagram of full subtractor
Truth table of full subtractor