flip flop

Basics and Overview of Digital Circuits – Flip Flops


The flip flops is a sequential logic circuit electronics device with two stable states that are binary “0” or binary “1”. The store binary data can be change by applies clock pulse. The fundamental component of digital electronics is flip flops and latches. It is use in computers, communications, and many other types of systems. Flip flops is a basic storage sequential circuit.

What is a Flip Flop?

Our last lesson was about multiplexer’s demultiplexers encoders and decoders combinational logic devices where the output is dependent only on the current state of its inputs. The example of sequential circuit is Flip-flops or latches. Which have a form of memory built in. this means it can use not only the data from their current inputs but also use in previous data. Flip-flops are bistable devices. Logic gates are component of Flip-flops.

There are different types of flip flops with different character and different applications depending upon types of flip flops. Flip flop has also known as bitable multivibrator because it has two stable states. Its state can be change by applying clock pulses. There are two outputs in a flip flops that are Q and Q̅. Either of Q and Q̅ can be used as output but normal practice is to take Q as output port and Q̅ as an inverted output port. When the output Q is “1” than the flip flop is called “SET” or “HIGH” “logic 1”, and when Q is “0” than the flip flop is called “RESET” or “LOW” “logic 0”.
Below the figure show the block diagram of flip flop with many input terminal and two output terminal that are Q and Q̅.


The excitation state is use for alter the output from one state to another state. Flip flop can be either synchronous or asynchronous. When trigger pulse provide at time to all flop flops is called synchronous flip flop and when trigger pulse not provide at a time to all flip flop is known as asynchronous.

Latches vs Flip-Flops

The difference between latches and flop flops are a latches are level trigger but flip flop is edge triggered i.e. either positive edge or negative edge. Both are “ONE” bit binary storage devices. Here the some points about Latches vs Flip-Flops.


  1. Latches do not require clock signal.
  2. A latch is an asynchronous device.
  3. It is a Level Sensitive device (Level Triggering is involved).
  4. Latches are transparent devices i.e. when they are enabled, the output changes immediately if the input
  5. Latches are simpler to design as there is no clock signal (no careful routing of dock signal is required).
  6. It is faster.
  7. The power requirement of a latch is high

Flip – flops

  1. Flip- flops have clock signals
  2. A FF is a synchronous
  3. The FF to either change its output or retain it depending on the clock signal.
  4. A flip- flop is an edge trigger
  5. Power requirement is high.
  6. Flip – flops are comparatively slower than latches due to dock signal.
  7. When compare to latches: FF are more complex to design as they have dock signal and it has to be carefully routed. This is because all the FF in a design should have a dock signal and the delay in the dock reaching each flip-flop must be minimum or negligible
  8. A flip-flop works based on the clock signal.

The circuit diagram of SR latch and SR flip-flops.

SR-latch flop flops

SR Flip-Flop


Types of flip-flops:

A flip-flop can be constructed using NAND or NOR gates. It is a bistable device.

Set-Reset or S-R FF:

The set and reset flip flop is made of NAND gates. There are two inputs and two outputs. The outputs are cross connection with inputs which are shown in figure.

  • The S-R FF is a basic FF, which has two inputs S and R and two outputs.
  • R stands for RESET and S stands for SET.
  • If the output of Q is “HIGH” than FF is called “SET” and If the output of Q is “LOW” than FF is called “SET”
  • Both the outputs of FF are the complement of each other (i.e., output Q̅ and Q ).
  • The characteristic equation is  Qn+1​=S+.Qn​.
  • The circuit and the excitation table of the S-R FF is shown below.

S-R Flip Flop & Characteristic Table


J-K Flip Flop:

It is the most versatile of the flip-flops. It has also the two inputs and two outputs and it was introduce for reduce the draw back in SR flip flop.

  • The invalid state of S-R flip flop is removed in J-K Flip Flop.
  • The J-K Flip Flop is similar to S-R flip flop because it has two inputs i.e., Jand K. and two outputs ie Q and Q̅.
  • Both the inputs of J-K FF are high or ‘1’, the flip flop will toggle and it is the drawback of JK FF.

J-K Flip-flop & Characteristic Table


D Flip Flop:

In D flip flop the D stand “DATA” and it is constructed by JK FF with each other via an inverter or NOT gate.

  • D flip flop is removing S-R flip flops drawback by connect the input terminal of SR flip-flop with each other via an inverter or NOT gate.
  • The NOT gate placed for ensuring that inputs S and R will never equal.
  • The structure of D-FF is the same as SR FF; only difference is that is single input terminal.
  • D stands for ‘Delay”.
  • The characteristic equation is Qn+1= D



Toggle or T flip- flop:

T flip-flop  can be constructed from any of these three flip flop like SR, D, and JK FF and it is also known as trigger/toggle FF.

  • The inputs of JK FF are connected with each other to construct the T flip flop.
  • T stands for “Toggle”.
  • The toggle mode is obtained by input is high i.e. “logic 1”.
  • The hold mode is obtained when input in low.
  • The characteristic equation is Qn+1​=T.Qn​ˉ​+Qn​.Kˉ

T Flip-flop & Characteristic Table


Excitation Table

Below the table show the inputs of FF. This gives the input and output of the flip flops.


Applications of Flip-Flops

The FF are the back bone of the digital computer it is use in various typo of application in our daily life here the some examples of the flip flops is give below.

    1. Frequency Dividers
    2. Shift Registers
    3. Counters
    4. Storage Registers
    5. Latches
    6. Bounce elimination switch
    7. Multivibrator
    8. Registers
    9. Memory
    10. Data storage
    11. Parallel data storage


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